led7seg.s
author Tero Marttila <terom@paivola.fi>
Thu, 03 Apr 2014 19:44:13 +0300
changeset 51 ec6271f0637b
parent 32 7ceb76b5a104
permissions -rw-r--r--
make: fix build-deps, and avr-objdump -d build/src/hello.elf

build/src/hello.elf: file format elf32-avr


Disassembly of section .text:

00000000 <__vectors>:
0: 0c 94 34 00 jmp 0x68 ; 0x68 <__ctors_end>
4: 0c 94 3e 00 jmp 0x7c ; 0x7c <__bad_interrupt>
8: 0c 94 3e 00 jmp 0x7c ; 0x7c <__bad_interrupt>
c: 0c 94 3e 00 jmp 0x7c ; 0x7c <__bad_interrupt>
10: 0c 94 3e 00 jmp 0x7c ; 0x7c <__bad_interrupt>
14: 0c 94 3e 00 jmp 0x7c ; 0x7c <__bad_interrupt>
18: 0c 94 3e 00 jmp 0x7c ; 0x7c <__bad_interrupt>
1c: 0c 94 3e 00 jmp 0x7c ; 0x7c <__bad_interrupt>
20: 0c 94 3e 00 jmp 0x7c ; 0x7c <__bad_interrupt>
24: 0c 94 3e 00 jmp 0x7c ; 0x7c <__bad_interrupt>
28: 0c 94 3e 00 jmp 0x7c ; 0x7c <__bad_interrupt>
2c: 0c 94 58 00 jmp 0xb0 ; 0xb0 <__vector_11>
30: 0c 94 3e 00 jmp 0x7c ; 0x7c <__bad_interrupt>
34: 0c 94 3e 00 jmp 0x7c ; 0x7c <__bad_interrupt>
38: 0c 94 3e 00 jmp 0x7c ; 0x7c <__bad_interrupt>
3c: 0c 94 3e 00 jmp 0x7c ; 0x7c <__bad_interrupt>
40: 0c 94 3e 00 jmp 0x7c ; 0x7c <__bad_interrupt>
44: 0c 94 3e 00 jmp 0x7c ; 0x7c <__bad_interrupt>
48: 0c 94 3e 00 jmp 0x7c ; 0x7c <__bad_interrupt>
4c: 0c 94 3e 00 jmp 0x7c ; 0x7c <__bad_interrupt>
50: 0c 94 3e 00 jmp 0x7c ; 0x7c <__bad_interrupt>
54: 0c 94 3e 00 jmp 0x7c ; 0x7c <__bad_interrupt>
58: 0c 94 3e 00 jmp 0x7c ; 0x7c <__bad_interrupt>
5c: 0c 94 3e 00 jmp 0x7c ; 0x7c <__bad_interrupt>
60: 0c 94 3e 00 jmp 0x7c ; 0x7c <__bad_interrupt>
64: 0c 94 3e 00 jmp 0x7c ; 0x7c <__bad_interrupt>

00000068 <__ctors_end>:
68: 11 24 eor r1, r1
6a: 1f be out 0x3f, r1 ; 63
6c: cf ef ldi r28, 0xFF ; 255
6e: d8 e0 ldi r29, 0x08 ; 8
70: de bf out 0x3e, r29 ; 62
72: cd bf out 0x3d, r28 ; 61
74: 0e 94 90 00 call 0x120 ; 0x120 <main>
78: 0c 94 a3 00 jmp 0x146 ; 0x146 <_exit>

0000007c <__bad_interrupt>:
7c: 0c 94 00 00 jmp 0 ; 0x0 <__vectors>

00000080 <timer_init>:
80: 10 92 80 00 sts 0x0080, r1
84: 88 e0 ldi r24, 0x08 ; 8
86: 80 93 81 00 sts 0x0081, r24
8a: 10 92 82 00 sts 0x0082, r1
8e: 08 95 ret

00000090 <timer1_start>:
90: 10 92 85 00 sts 0x0085, r1
94: 10 92 84 00 sts 0x0084, r1
98: 90 93 89 00 sts 0x0089, r25
9c: 80 93 88 00 sts 0x0088, r24
a0: f1 9a sbi 0x1e, 1 ; 30
a2: 82 e0 ldi r24, 0x02 ; 2
a4: 80 93 6f 00 sts 0x006F, r24
a8: 8d e0 ldi r24, 0x0D ; 13
aa: 80 93 81 00 sts 0x0081, r24
ae: 08 95 ret

000000b0 <__vector_11>:
b0: 1f 92 push r1
b2: 0f 92 push r0
b4: 0f b6 in r0, 0x3f ; 63
b6: 0f 92 push r0
b8: 11 24 eor r1, r1
ba: 10 92 81 00 sts 0x0081, r1
be: f1 98 cbi 0x1e, 1 ; 30
c0: 0f 90 pop r0
c2: 0f be out 0x3f, r0 ; 63
c4: 0f 90 pop r0
c6: 1f 90 pop r1
c8: 18 95 reti

000000ca <timer_sleep>:
ca: 0e 94 48 00 call 0x90 ; 0x90 <timer1_start>
ce: 81 e0 ldi r24, 0x01 ; 1
d0: 83 bf out 0x33, r24 ; 51
d2: 01 c0 rjmp .+2 ; 0xd6 <timer_sleep+0xc>
d4: 88 95 sleep
d6: 8e b3 in r24, 0x1e ; 30
d8: 81 fd sbrc r24, 1
da: fc cf rjmp .-8 ; 0xd4 <timer_sleep+0xa>
dc: 13 be out 0x33, r1 ; 51
de: 08 95 ret

000000e0 <serial_init>:
e0: 10 92 c0 00 sts 0x00C0, r1
e4: 10 92 c1 00 sts 0x00C1, r1
e8: 86 e0 ldi r24, 0x06 ; 6
ea: 80 93 c2 00 sts 0x00C2, r24
ee: 87 e6 ldi r24, 0x67 ; 103
f0: 90 e0 ldi r25, 0x00 ; 0
f2: 90 93 c5 00 sts 0x00C5, r25
f6: 80 93 c4 00 sts 0x00C4, r24
fa: 08 95 ret

000000fc <serial_enable>:
fc: 88 e1 ldi r24, 0x18 ; 24
fe: 80 93 c1 00 sts 0x00C1, r24
102: 08 95 ret

00000104 <serial_read>:
104: 80 91 c0 00 lds r24, 0x00C0
108: 87 ff sbrs r24, 7
10a: fc cf rjmp .-8 ; 0x104 <serial_read>
10c: 80 91 c6 00 lds r24, 0x00C6
110: 08 95 ret

00000112 <serial_write>:
112: 90 91 c0 00 lds r25, 0x00C0
116: 95 ff sbrs r25, 5
118: fc cf rjmp .-8 ; 0x112 <serial_write>
11a: 80 93 c6 00 sts 0x00C6, r24
11e: 08 95 ret

00000120 <main>:
120: 1f 93 push r17
122: 0e 94 40 00 call 0x80 ; 0x80 <timer_init>
126: 0e 94 70 00 call 0xe0 ; 0xe0 <serial_init>
12a: 25 9a sbi 0x04, 5 ; 4
12c: 0e 94 7e 00 call 0xfc ; 0xfc <serial_enable>
130: 78 94 sei
132: 88 e5 ldi r24, 0x58 ; 88
134: 10 e2 ldi r17, 0x20 ; 32
136: 0e 94 89 00 call 0x112 ; 0x112 <serial_write>
13a: 85 b1 in r24, 0x05 ; 5
13c: 81 27 eor r24, r17
13e: 85 b9 out 0x05, r24 ; 5
140: 0e 94 82 00 call 0x104 ; 0x104 <serial_read>
144: f8 cf rjmp .-16 ; 0x136 <main+0x16>

00000146 <_exit>:
146: f8 94 cli

00000148 <__stop_program>:
148: ff cf rjmp .-2 ; 0x148 <__stop_program>
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.nolist
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.include "m168def.inc"      ; Same family as 328P
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.list
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;; Interrupt Vector
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.org 0x00
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        rjmp        init
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.org OC1Aaddr
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		; Timer/Counter1 Compare Output A
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		rjmp		Timer_OC1A
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.org OC0Aaddr
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        ; Timer/Counter0 Compare Output A
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        rjmp        Timer_OC0A
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.org SPIaddr
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        rjmp        SPI_Interrupt
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8
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.org ADCCaddr
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        rjmp        ADC_Interrupt
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.org 0x40
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;; Syntax
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.include "macros.inc"
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;; SPI
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.include "spi.inc"
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;; LCD
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.include "led7seg.inc"
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;; DIPs
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.include "dip.inc"
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;; ADC
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; ADC Interrupt handler
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On_ADC:
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    ; DEBUG
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		sbi			PIND, PORTD7
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    ; Check timer, from r16
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        rcall       ADC_Read8
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        ldi         r17, 64
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        mul         r16, r17
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        mov         XL, r0
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        mov         XH, r1 
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        rjmp       Timer_Update
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.set ADC_Handler = On_ADC
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.include "adc.inc"
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;; Timer
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.set TIMER0_CB_A = SPI_Update
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.include "timer.inc"
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;; Utils
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.include "delay.inc"
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.include "div.inc"
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Sleep_ADC:
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        ; delay
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        rcall       ADC_Read8 
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        ; rcall       DIP_Read8
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        ; Sleep for 64 * var timer cycles
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        ldi         r17, 64
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        mul         r16, r17
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        mov         XL, r0
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        mov         XH, r1 
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        rjmp       Timer_Sleep
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;; Show value
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Main_ShowValue:
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        ; load value to r16
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        ; rcall       DIP_Read8
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        rcall       ADC_Read8
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        ; rcall       Timer0_Read8
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        ; display from r16
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        rcall       LED7_ShowHex
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        ; wait
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        rcall       Sleep_ADC
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        ; ldi         XL, 0
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        ; ldi         XH, 16
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        ; rcall       Timer_Sleep
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        ; rcall       ADC_Read8
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        ; mov         r20, r16
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        ; rcall       VarDelay
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        ; continue
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        rjmp        Main_ShowValue
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Tero Marttila <terom@fixme.fi>
parents: 23
diff changeset
   104
33496b1a964f show (hexa)decimal values on display from ADC or DIP
Tero Marttila <terom@fixme.fi>
parents: 23
diff changeset
   105
;; Count down from F
6
88c930373d62 LCD spin\!
Tero Marttila <terom@fixme.fi>
parents: 4
diff changeset
   106
; Returns once we've hit zero
88c930373d62 LCD spin\!
Tero Marttila <terom@fixme.fi>
parents: 4
diff changeset
   107
Main_Countdown:
16
11d6167a67cb hex A-F for LCD
Tero Marttila <terom@fixme.fi>
parents: 15
diff changeset
   108
        ; init from F
17
a7c668003a19 split led7seg.s into .inc modules, and update Makefile to use .s -> .hex, and above .inc's for led7seg
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parents: 16
diff changeset
   109
        ldi         r24, LED7_F
6
88c930373d62 LCD spin\!
Tero Marttila <terom@fixme.fi>
parents: 4
diff changeset
   110
15
c8f3a514bbef read SPI to r10, and use it (hack)
Tero Marttila <terom@fixme.fi>
parents: 8
diff changeset
   111
_count_loop:
6
88c930373d62 LCD spin\!
Tero Marttila <terom@fixme.fi>
parents: 4
diff changeset
   112
        ; display
88c930373d62 LCD spin\!
Tero Marttila <terom@fixme.fi>
parents: 4
diff changeset
   113
        mov         r16, r24
25
33496b1a964f show (hexa)decimal values on display from ADC or DIP
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parents: 23
diff changeset
   114
        mov         r16, r24
17
a7c668003a19 split led7seg.s into .inc modules, and update Makefile to use .s -> .hex, and above .inc's for led7seg
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parents: 16
diff changeset
   115
        rcall       LED7_Show
6
88c930373d62 LCD spin\!
Tero Marttila <terom@fixme.fi>
parents: 4
diff changeset
   116
88c930373d62 LCD spin\!
Tero Marttila <terom@fixme.fi>
parents: 4
diff changeset
   117
        ; exit if zero
88c930373d62 LCD spin\!
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parents: 4
diff changeset
   118
        tst         r24
15
c8f3a514bbef read SPI to r10, and use it (hack)
Tero Marttila <terom@fixme.fi>
parents: 8
diff changeset
   119
        breq        _count_end
6
88c930373d62 LCD spin\!
Tero Marttila <terom@fixme.fi>
parents: 4
diff changeset
   120
88c930373d62 LCD spin\!
Tero Marttila <terom@fixme.fi>
parents: 4
diff changeset
   121
        ; count down
88c930373d62 LCD spin\!
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parents: 4
diff changeset
   122
        dec         r24
88c930373d62 LCD spin\!
Tero Marttila <terom@fixme.fi>
parents: 4
diff changeset
   123
88c930373d62 LCD spin\!
Tero Marttila <terom@fixme.fi>
parents: 4
diff changeset
   124
        ; wait...
25
33496b1a964f show (hexa)decimal values on display from ADC or DIP
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parents: 23
diff changeset
   125
        rcall       Sleep_ADC
6
88c930373d62 LCD spin\!
Tero Marttila <terom@fixme.fi>
parents: 4
diff changeset
   126
88c930373d62 LCD spin\!
Tero Marttila <terom@fixme.fi>
parents: 4
diff changeset
   127
        ; next
15
c8f3a514bbef read SPI to r10, and use it (hack)
Tero Marttila <terom@fixme.fi>
parents: 8
diff changeset
   128
        rjmp        _count_loop
c8f3a514bbef read SPI to r10, and use it (hack)
Tero Marttila <terom@fixme.fi>
parents: 8
diff changeset
   129
c8f3a514bbef read SPI to r10, and use it (hack)
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parents: 8
diff changeset
   130
_count_end:
c8f3a514bbef read SPI to r10, and use it (hack)
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parents: 8
diff changeset
   131
        ; done
c8f3a514bbef read SPI to r10, and use it (hack)
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parents: 8
diff changeset
   132
        ret
6
88c930373d62 LCD spin\!
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parents: 4
diff changeset
   133
25
33496b1a964f show (hexa)decimal values on display from ADC or DIP
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parents: 23
diff changeset
   134
;; Count up from 00 -> 255
33496b1a964f show (hexa)decimal values on display from ADC or DIP
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   135
; Returns once done
33496b1a964f show (hexa)decimal values on display from ADC or DIP
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parents: 23
diff changeset
   136
Main_CountUp:
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parents: 23
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   137
        ; init from 0
33496b1a964f show (hexa)decimal values on display from ADC or DIP
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parents: 23
diff changeset
   138
        ldi         r24, 0
33496b1a964f show (hexa)decimal values on display from ADC or DIP
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parents: 23
diff changeset
   139
33496b1a964f show (hexa)decimal values on display from ADC or DIP
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parents: 23
diff changeset
   140
_countup_loop:
33496b1a964f show (hexa)decimal values on display from ADC or DIP
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parents: 23
diff changeset
   141
        ; display
33496b1a964f show (hexa)decimal values on display from ADC or DIP
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parents: 23
diff changeset
   142
        mov         r16, r24
33496b1a964f show (hexa)decimal values on display from ADC or DIP
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parents: 23
diff changeset
   143
        rcall       LED7_ShowDec
33496b1a964f show (hexa)decimal values on display from ADC or DIP
Tero Marttila <terom@fixme.fi>
parents: 23
diff changeset
   144
33496b1a964f show (hexa)decimal values on display from ADC or DIP
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parents: 23
diff changeset
   145
        ; wait...
33496b1a964f show (hexa)decimal values on display from ADC or DIP
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parents: 23
diff changeset
   146
        rcall       Sleep_ADC
33496b1a964f show (hexa)decimal values on display from ADC or DIP
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parents: 23
diff changeset
   147
33496b1a964f show (hexa)decimal values on display from ADC or DIP
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parents: 23
diff changeset
   148
        ; exit if zero
33496b1a964f show (hexa)decimal values on display from ADC or DIP
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parents: 23
diff changeset
   149
        cpi         r24, 255
33496b1a964f show (hexa)decimal values on display from ADC or DIP
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parents: 23
diff changeset
   150
        breq        _countup_end
33496b1a964f show (hexa)decimal values on display from ADC or DIP
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parents: 23
diff changeset
   151
33496b1a964f show (hexa)decimal values on display from ADC or DIP
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parents: 23
diff changeset
   152
        ; count up
33496b1a964f show (hexa)decimal values on display from ADC or DIP
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parents: 23
diff changeset
   153
        inc         r24
33496b1a964f show (hexa)decimal values on display from ADC or DIP
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parents: 23
diff changeset
   154
33496b1a964f show (hexa)decimal values on display from ADC or DIP
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parents: 23
diff changeset
   155
        ; continue
33496b1a964f show (hexa)decimal values on display from ADC or DIP
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parents: 23
diff changeset
   156
        rjmp        _countup_loop
33496b1a964f show (hexa)decimal values on display from ADC or DIP
Tero Marttila <terom@fixme.fi>
parents: 23
diff changeset
   157
33496b1a964f show (hexa)decimal values on display from ADC or DIP
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parents: 23
diff changeset
   158
_countup_end:
33496b1a964f show (hexa)decimal values on display from ADC or DIP
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parents: 23
diff changeset
   159
        ; done
33496b1a964f show (hexa)decimal values on display from ADC or DIP
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parents: 23
diff changeset
   160
        ret
33496b1a964f show (hexa)decimal values on display from ADC or DIP
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parents: 23
diff changeset
   161
6
88c930373d62 LCD spin\!
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parents: 4
diff changeset
   162
;; Blink between dot and empty
88c930373d62 LCD spin\!
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parents: 4
diff changeset
   163
Main_Blink:
88c930373d62 LCD spin\!
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parents: 4
diff changeset
   164
_blink_loop:
88c930373d62 LCD spin\!
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parents: 4
diff changeset
   165
        ; dot
17
a7c668003a19 split led7seg.s into .inc modules, and update Makefile to use .s -> .hex, and above .inc's for led7seg
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parents: 16
diff changeset
   166
        ldi         r16, LED7_DOT
25
33496b1a964f show (hexa)decimal values on display from ADC or DIP
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parents: 23
diff changeset
   167
        ldi         r17, LED7_EMPTY
17
a7c668003a19 split led7seg.s into .inc modules, and update Makefile to use .s -> .hex, and above .inc's for led7seg
Tero Marttila <terom@fixme.fi>
parents: 16
diff changeset
   168
        rcall       LED7_Show
6
88c930373d62 LCD spin\!
Tero Marttila <terom@fixme.fi>
parents: 4
diff changeset
   169
88c930373d62 LCD spin\!
Tero Marttila <terom@fixme.fi>
parents: 4
diff changeset
   170
        ; wait...
25
33496b1a964f show (hexa)decimal values on display from ADC or DIP
Tero Marttila <terom@fixme.fi>
parents: 23
diff changeset
   171
        rcall       Sleep_ADC
6
88c930373d62 LCD spin\!
Tero Marttila <terom@fixme.fi>
parents: 4
diff changeset
   172
        
88c930373d62 LCD spin\!
Tero Marttila <terom@fixme.fi>
parents: 4
diff changeset
   173
        ; empty
17
a7c668003a19 split led7seg.s into .inc modules, and update Makefile to use .s -> .hex, and above .inc's for led7seg
Tero Marttila <terom@fixme.fi>
parents: 16
diff changeset
   174
        ldi         r16, LED7_EMPTY
25
33496b1a964f show (hexa)decimal values on display from ADC or DIP
Tero Marttila <terom@fixme.fi>
parents: 23
diff changeset
   175
        ldi         r17, LED7_DOT
17
a7c668003a19 split led7seg.s into .inc modules, and update Makefile to use .s -> .hex, and above .inc's for led7seg
Tero Marttila <terom@fixme.fi>
parents: 16
diff changeset
   176
        rcall       LED7_Show
6
88c930373d62 LCD spin\!
Tero Marttila <terom@fixme.fi>
parents: 4
diff changeset
   177
        
25
33496b1a964f show (hexa)decimal values on display from ADC or DIP
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parents: 23
diff changeset
   178
        ; wait... 
33496b1a964f show (hexa)decimal values on display from ADC or DIP
Tero Marttila <terom@fixme.fi>
parents: 23
diff changeset
   179
        rcall       Sleep_ADC
6
88c930373d62 LCD spin\!
Tero Marttila <terom@fixme.fi>
parents: 4
diff changeset
   180
        
88c930373d62 LCD spin\!
Tero Marttila <terom@fixme.fi>
parents: 4
diff changeset
   181
        ; loop
88c930373d62 LCD spin\!
Tero Marttila <terom@fixme.fi>
parents: 4
diff changeset
   182
        rjmp        _blink_loop
88c930373d62 LCD spin\!
Tero Marttila <terom@fixme.fi>
parents: 4
diff changeset
   183
 
88c930373d62 LCD spin\!
Tero Marttila <terom@fixme.fi>
parents: 4
diff changeset
   184
;; Chase segments
88c930373d62 LCD spin\!
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parents: 4
diff changeset
   185
Main_Spin:
88c930373d62 LCD spin\!
Tero Marttila <terom@fixme.fi>
parents: 4
diff changeset
   186
_spin_init:
88c930373d62 LCD spin\!
Tero Marttila <terom@fixme.fi>
parents: 4
diff changeset
   187
        ; init from top
88c930373d62 LCD spin\!
Tero Marttila <terom@fixme.fi>
parents: 4
diff changeset
   188
        ldi         r24, 0b00000001 
88c930373d62 LCD spin\!
Tero Marttila <terom@fixme.fi>
parents: 4
diff changeset
   189
88c930373d62 LCD spin\!
Tero Marttila <terom@fixme.fi>
parents: 4
diff changeset
   190
_spin_next:
88c930373d62 LCD spin\!
Tero Marttila <terom@fixme.fi>
parents: 4
diff changeset
   191
        ; display
88c930373d62 LCD spin\!
Tero Marttila <terom@fixme.fi>
parents: 4
diff changeset
   192
        mov         r16, r24
23
a6afc0eb347f synchronous SPI, two-digit led7
Tero Marttila <terom@fixme.fi>
parents: 19
diff changeset
   193
        mov         r17, r24
a6afc0eb347f synchronous SPI, two-digit led7
Tero Marttila <terom@fixme.fi>
parents: 19
diff changeset
   194
        com         r17
32
7ceb76b5a104 semi-broken Timer_Update mechanism
Tero Marttila <terom@fixme.fi>
parents: 30
diff changeset
   195
        andi        r17, 0b00111111
17
a7c668003a19 split led7seg.s into .inc modules, and update Makefile to use .s -> .hex, and above .inc's for led7seg
Tero Marttila <terom@fixme.fi>
parents: 16
diff changeset
   196
        rcall       LED7_ShowRaw
6
88c930373d62 LCD spin\!
Tero Marttila <terom@fixme.fi>
parents: 4
diff changeset
   197
18
79b25e81721f use timer for 1s delay
Tero Marttila <terom@fixme.fi>
parents: 17
diff changeset
   198
        ; delay
25
33496b1a964f show (hexa)decimal values on display from ADC or DIP
Tero Marttila <terom@fixme.fi>
parents: 23
diff changeset
   199
        rcall       Sleep_ADC
33496b1a964f show (hexa)decimal values on display from ADC or DIP
Tero Marttila <terom@fixme.fi>
parents: 23
diff changeset
   200
        
6
88c930373d62 LCD spin\!
Tero Marttila <terom@fixme.fi>
parents: 4
diff changeset
   201
        ; next segment
88c930373d62 LCD spin\!
Tero Marttila <terom@fixme.fi>
parents: 4
diff changeset
   202
        lsl         r24
88c930373d62 LCD spin\!
Tero Marttila <terom@fixme.fi>
parents: 4
diff changeset
   203
        
88c930373d62 LCD spin\!
Tero Marttila <terom@fixme.fi>
parents: 4
diff changeset
   204
        ; go back to A if we hit G
88c930373d62 LCD spin\!
Tero Marttila <terom@fixme.fi>
parents: 4
diff changeset
   205
        sbrc        r24, 6
88c930373d62 LCD spin\!
Tero Marttila <terom@fixme.fi>
parents: 4
diff changeset
   206
        rjmp        _spin_init
88c930373d62 LCD spin\!
Tero Marttila <terom@fixme.fi>
parents: 4
diff changeset
   207
88c930373d62 LCD spin\!
Tero Marttila <terom@fixme.fi>
parents: 4
diff changeset
   208
        rjmp        _spin_next
4
b45780fbd7e8 count down a and blink \o/
Tero Marttila <terom@fixme.fi>
parents: 3
diff changeset
   209
b45780fbd7e8 count down a and blink \o/
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parents: 3
diff changeset
   210
Main:
3
0584de343264 SPI/LCD thingie
Tero Marttila <terom@fixme.fi>
parents:
diff changeset
   211
init:
0584de343264 SPI/LCD thingie
Tero Marttila <terom@fixme.fi>
parents:
diff changeset
   212
    ; Stack
0584de343264 SPI/LCD thingie
Tero Marttila <terom@fixme.fi>
parents:
diff changeset
   213
        ldi         r16, high(RAMEND)
0584de343264 SPI/LCD thingie
Tero Marttila <terom@fixme.fi>
parents:
diff changeset
   214
        ldi         r17, low(RAMEND)
0584de343264 SPI/LCD thingie
Tero Marttila <terom@fixme.fi>
parents:
diff changeset
   215
        out         SPH, r16
0584de343264 SPI/LCD thingie
Tero Marttila <terom@fixme.fi>
parents:
diff changeset
   216
        out         SPL, r17
0584de343264 SPI/LCD thingie
Tero Marttila <terom@fixme.fi>
parents:
diff changeset
   217
0584de343264 SPI/LCD thingie
Tero Marttila <terom@fixme.fi>
parents:
diff changeset
   218
    ; Enable interrupts
0584de343264 SPI/LCD thingie
Tero Marttila <terom@fixme.fi>
parents:
diff changeset
   219
        sei
0584de343264 SPI/LCD thingie
Tero Marttila <terom@fixme.fi>
parents:
diff changeset
   220
8
Tero Marttila <terom@fixme.fi>
parents: 7
diff changeset
   221
    ; ADC (slowest to start up)
23
a6afc0eb347f synchronous SPI, two-digit led7
Tero Marttila <terom@fixme.fi>
parents: 19
diff changeset
   222
        rcall       ADC_Init
18
79b25e81721f use timer for 1s delay
Tero Marttila <terom@fixme.fi>
parents: 17
diff changeset
   223
    
79b25e81721f use timer for 1s delay
Tero Marttila <terom@fixme.fi>
parents: 17
diff changeset
   224
    ; Timer
79b25e81721f use timer for 1s delay
Tero Marttila <terom@fixme.fi>
parents: 17
diff changeset
   225
        rcall       Timer_Init
8
Tero Marttila <terom@fixme.fi>
parents: 7
diff changeset
   226
3
0584de343264 SPI/LCD thingie
Tero Marttila <terom@fixme.fi>
parents:
diff changeset
   227
    ; SPI
0584de343264 SPI/LCD thingie
Tero Marttila <terom@fixme.fi>
parents:
diff changeset
   228
        rcall       SPI_Init
0584de343264 SPI/LCD thingie
Tero Marttila <terom@fixme.fi>
parents:
diff changeset
   229
    
8
Tero Marttila <terom@fixme.fi>
parents: 7
diff changeset
   230
    ; LCD (requires interrupts, blocks)
17
a7c668003a19 split led7seg.s into .inc modules, and update Makefile to use .s -> .hex, and above .inc's for led7seg
Tero Marttila <terom@fixme.fi>
parents: 16
diff changeset
   231
        rcall       LED7_Init    
6
88c930373d62 LCD spin\!
Tero Marttila <terom@fixme.fi>
parents: 4
diff changeset
   232
    
30
5226e512755c Use Timer0 for async SPI updates (semi-useful)
Tero Marttila <terom@fixme.fi>
parents: 28
diff changeset
   233
    ; DEBUG
5226e512755c Use Timer0 for async SPI updates (semi-useful)
Tero Marttila <terom@fixme.fi>
parents: 28
diff changeset
   234
        sbi         DDRD, PORTD7
5226e512755c Use Timer0 for async SPI updates (semi-useful)
Tero Marttila <terom@fixme.fi>
parents: 28
diff changeset
   235
        cbi         PORTD, PORTD7
5226e512755c Use Timer0 for async SPI updates (semi-useful)
Tero Marttila <terom@fixme.fi>
parents: 28
diff changeset
   236
6
88c930373d62 LCD spin\!
Tero Marttila <terom@fixme.fi>
parents: 4
diff changeset
   237
    ; Run
32
7ceb76b5a104 semi-broken Timer_Update mechanism
Tero Marttila <terom@fixme.fi>
parents: 30
diff changeset
   238
        rcall       Main_Countup
7ceb76b5a104 semi-broken Timer_Update mechanism
Tero Marttila <terom@fixme.fi>
parents: 30
diff changeset
   239
        ; rcall       Main_Countdown
30
5226e512755c Use Timer0 for async SPI updates (semi-useful)
Tero Marttila <terom@fixme.fi>
parents: 28
diff changeset
   240
        ; rcall       Main_ShowValue
32
7ceb76b5a104 semi-broken Timer_Update mechanism
Tero Marttila <terom@fixme.fi>
parents: 30
diff changeset
   241
        ; rcall       Main_Spin
7ceb76b5a104 semi-broken Timer_Update mechanism
Tero Marttila <terom@fixme.fi>
parents: 30
diff changeset
   242
        rcall       Main_Blink
4
b45780fbd7e8 count down a and blink \o/
Tero Marttila <terom@fixme.fi>
parents: 3
diff changeset
   243
b45780fbd7e8 count down a and blink \o/
Tero Marttila <terom@fixme.fi>
parents: 3
diff changeset
   244
end:
b45780fbd7e8 count down a and blink \o/
Tero Marttila <terom@fixme.fi>
parents: 3
diff changeset
   245
        rjmp        end
b45780fbd7e8 count down a and blink \o/
Tero Marttila <terom@fixme.fi>
parents: 3
diff changeset
   246