equal
deleted
inserted
replaced
137 rcall Timer1_Stop |
137 rcall Timer1_Stop |
138 |
138 |
139 out SREG, r0 |
139 out SREG, r0 |
140 reti |
140 reti |
141 |
141 |
|
142 ;; Prime the timer and sleep for 1s |
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143 Timer_Sleep_1s: |
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144 ; Initialize counter to 16k cycles |
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145 ldi XH, high(16 * 1024) |
|
146 ldi XL, low(16 * 1024) |
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147 |
|
148 ;; Continue |
|
149 |
142 ;; Count to X |
150 ;; Count to X |
143 Timer_Sleep: |
151 Timer_Sleep: |
144 ; Set TOP |
152 ; Set TOP |
145 sts OCR1AH, XH |
153 sts OCR1AH, XH |
146 sts OCR1AL, XL |
154 sts OCR1AL, XL |
156 rjmp _timer1_sleep |
164 rjmp _timer1_sleep |
157 |
165 |
158 ; Done |
166 ; Done |
159 ret |
167 ret |
160 |
168 |
161 ;; Prime the timer and sleep for 1s |
169 ;; Update timer for given timeout |
162 Timer_Sleep_1s: |
170 Timer_Update: |
163 ; Initialize counter to 16k cycles |
171 ; Set TOP |
164 ldi XH, high(16 * 1024) |
172 sts OCR1AH, XH |
165 ldi XL, low(16 * 1024) |
173 sts OCR1AL, XL |
|
174 |
|
175 ; Check timer |
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176 lds YL, TCNT1L |
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177 lds YH, TCNT1H |
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178 |
|
179 cp YL, XL |
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180 cpc YH, XH |
166 |
181 |
167 ; Start timer |
182 brlo timer_up_out |
168 rjmp Timer_Sleep |
|
169 |
183 |
|
184 ; Update |
|
185 ; XXX: figure out a better way to do this... |
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186 ldi r16, 0 |
|
187 subi XL, 2 |
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188 sbc XH, r16 |
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189 |
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190 sts TCNT1L, XL |
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191 sts TCNT1H, XH |
|
192 |
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193 timer_up_out: |
|
194 ; Done |
|
195 ret |
|
196 |