terom@0: .nolist
terom@0: .include "m168def.inc"      ; Same family as 328P
terom@0: .list
terom@0: 
terom@0: ; Interrupt vector
terom@2: .org 0x00
terom@0:         rjmp        main            ; Reset
terom@0: 
terom@2: .org OC1Aaddr
terom@2:         rjmp        timer           ; Timer 1 Compare A 
terom@2: 
terom@0: ; Program code
terom@0: main:
terom@2:     ; Setup pins for output
terom@2:         sbi         DDRB, PORTB4        ; Out
terom@2:         sbi         DDRB, PORTB5        ; Out
terom@2:         
terom@2:     ; Flags for output
terom@2:         ldi         r16, (1 << PORTB4)
terom@1: 
terom@2:     ; Setup Timer 0
terom@2:         ; Count to 64k
terom@3:         ldi         r18, HIGH(0xffff/2)
terom@3:         ldi         r19, LOW(0xffff/2)
terom@2:         sts         OCR1AH, r18
terom@2:         sts         OCR1AL, r19
terom@2:  
terom@2:         ; Normal port operation for both comperators
terom@2:         ; Bits WGM10:1 zero
terom@2:         ldi         r18,    0x00
terom@2:         sts         TCCR1A, r18
terom@2:  
terom@2:         ; CTC mode, 1/64 prescaled
terom@2:         ; the timer will start counting from now, but that shouldn't matter..
terom@2:         ldi         r18,    (1 << WGM12) | (0b011 << CS10)
terom@2:         sts         TCCR1B, r18
terom@2:        
terom@2:         ; Enable timer interrupt
terom@2:         ldi         r18, (1 << OCIE1A)
terom@2:         sts         TIMSK1, r18
terom@2:         
terom@2:         ; Setup sleep for Idle mode
terom@2:         ldi         r18, (0b000 << SM0) | (1 << SE)
terom@2:         sts         SMCR, r18
terom@2: 
terom@2:         ; ...and enable interrupts
terom@2:         sei
terom@0: 
terom@0: loop:
terom@2:         ; Flip
terom@2:         com         r16
terom@2:         
terom@2:         ; Output
terom@2:         out         PORTB, r16
terom@0: 
terom@2:         ; Wait
terom@2: wait:   sleep
terom@2:         cpi         r20, 1
terom@2:         brne        wait
terom@2:         ldi         r20, 0
terom@2: 
terom@2:         ; continue
terom@2:         rjmp loop
terom@2: 
terom@2: ; Counter overflow handler
terom@2: timer:
terom@2:         ; Set flag
terom@2:         ldi         r20, 1
terom@2: 
terom@2:         ; Re-enable interrupts
terom@2:         reti
terom@2: