# HG changeset patch # User Tero Marttila # Date 1273319735 -10800 # Node ID c8f3a514bbeffe8a3e3f9cc37f0957e67384f90a # Parent 1ebd5fc73d863ce3937389422c2c7f865142b142 read SPI to r10, and use it (hack) diff -r 1ebd5fc73d86 -r c8f3a514bbef led7seg.s --- a/led7seg.s Fri May 07 04:18:58 2010 +0300 +++ b/led7seg.s Sat May 08 14:55:35 2010 +0300 @@ -53,7 +53,7 @@ ;; Send byte ;; Input: r16 ;; XXX: should not be busy... -SPI_Send: +SPI_SendRecv: ; Flag sbi SPI_FLAGS, SPI_BUSY @@ -84,6 +84,9 @@ ; Drive SS high (off) sbi SPI_PORT, SPI_SS + ; Read + in r10, SPDR + ; Flag cbi SPI_FLAGS, SPI_BUSY @@ -141,7 +144,7 @@ ldi r16, 0b11111111 ; Output - rcall SPI_Send + rcall SPI_SendRecv rcall SPI_Wait ; Enable @@ -173,10 +176,10 @@ ;; Input: r16 LCD_ShowRaw: ; Invert - com r16 + ; com r16 ; Display - rjmp SPI_Send + rjmp SPI_SendRecv ;; ADC .equ ADC_DDR = DDRC @@ -263,14 +266,14 @@ ; init from 9 ldi r24, LCD_9 -loop: +_count_loop: ; display mov r16, r24 rcall LCD_Show ; exit if zero tst r24 - ret + breq _count_end ; count down dec r24 @@ -279,7 +282,11 @@ rcall Delay_1s ; next - rjmp loop + rjmp _count_loop + +_count_end: + ; done + ret ;; Blink between dot and empty Main_Blink: @@ -312,11 +319,17 @@ rcall LCD_ShowRaw ; variable delay -> r16 - rcall ADC_Read8 + ;rcall ADC_Read8 + ;mov r20, r16 + + ; delay from input + mov r20, r10 + + ; constant + ;ldi r20, 20 ; short delay, from ADC - mov r20, r16 - ldi r21, 1 + ldi r21, 255 rcall ShortDelay ; next segment @@ -340,7 +353,7 @@ sei ; ADC (slowest to start up) - rcall ADC_Init + ; rcall ADC_Init ; SPI rcall SPI_Init @@ -351,6 +364,10 @@ ; Run ; spin! rcall Main_Spin + + ; count! + ; rcall Main_Countdown + ; rcall Main_Blink end: rjmp end