diff -r 49643ef9d3d2 -r d485c5b3ab4d include/spi.h
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/include/spi.h	Wed Oct 08 23:20:19 2014 +0300
@@ -0,0 +1,65 @@
+#ifndef QMSK_SPI_H
+#define QMSK_SPI_H
+
+#include "stdlib.h"
+#include "port.h"
+
+static ioport_t *const SPI_DDR = &DDRB;
+static ioport_t *const SPI_PORT = &PORTB;
+
+static const byte SPI_SCK   = PORTB5;
+static const byte SPI_MISO  = PORTB4;
+static const byte SPI_MOSI  = PORTB3;
+static const byte SPI_SS    = PORTB2;
+
+enum spi_dord {
+    SPI_DORD_MSB        = 0b0,
+
+    SPI_DORD            = SPI_DORD_MSB
+};
+
+enum spi_cpol {
+    SPI_CPOL_0 = 0b0,
+    SPI_CPOL_1 = 0b1,
+
+    SPI_CPOL   = SPI_CPOL_1 // mode 3
+};
+
+enum spi_cpha {
+    SPI_CPHA_0  = 0b0,
+    SPI_CPHA_1  = 0b1,
+
+    SPI_CPHA   = SPI_CPHA_1 // mode 3
+};
+
+enum spi_clock {
+    SPI_CLOCK_4         = 0b000,
+    SPI_CLOCK_16        = 0b001,
+    SPI_CLOCK_64        = 0b010,
+    SPI_CLOCK_128       = 0b011,
+
+    SPI_CLOCK           = SPI_CLOCK_16
+};
+
+#define SPI_COUNT 2
+
+/*
+ * Initialize in SPI master mode.
+ */
+void spi_init ();
+
+/*
+ * Write out value, and return read value.
+ */
+byte spi_readwrite (byte value);
+
+/*
+ * Perform an SPI bus update.
+ */
+void spi_update ();
+
+void spi_set (byte index, byte value);
+
+byte spi_get (byte index);
+
+#endif