author | Tero Marttila <terom@fixme.fi> |
Fri, 14 May 2010 18:19:22 +0300 | |
changeset 31 | dfb246ecaf23 |
parent 3 | 0584de343264 |
permissions | -rw-r--r-- |
0 | 1 |
.nolist |
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.include "m168def.inc" ; Same family as 328P |
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.list |
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; Interrupt vector |
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.org 0x00 |
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rjmp main ; Reset |
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.org OC1Aaddr |
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rjmp timer ; Timer 1 Compare A |
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; Program code |
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main: |
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; Setup pins for output |
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sbi DDRB, PORTB4 ; Out |
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sbi DDRB, PORTB5 ; Out |
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; Flags for output |
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ldi r16, (1 << PORTB4) |
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1
e0b8d42c62e1
include m168def.inc with #directives removed
Tero Marttila <terom@fixme.fi>
parents:
0
diff
changeset
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; Setup Timer 0 |
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; Count to 64k |
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ldi r18, HIGH(0xffff/2) |
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ldi r19, LOW(0xffff/2) |
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sts OCR1AH, r18 |
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sts OCR1AL, r19 |
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; Normal port operation for both comperators |
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; Bits WGM10:1 zero |
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ldi r18, 0x00 |
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sts TCCR1A, r18 |
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; CTC mode, 1/64 prescaled |
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; the timer will start counting from now, but that shouldn't matter.. |
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ldi r18, (1 << WGM12) | (0b011 << CS10) |
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sts TCCR1B, r18 |
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; Enable timer interrupt |
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ldi r18, (1 << OCIE1A) |
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sts TIMSK1, r18 |
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; Setup sleep for Idle mode |
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ldi r18, (0b000 << SM0) | (1 << SE) |
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sts SMCR, r18 |
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; ...and enable interrupts |
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sei |
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loop: |
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; Flip |
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com r16 |
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; Output |
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out PORTB, r16 |
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; Wait |
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wait: sleep |
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cpi r20, 1 |
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brne wait |
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ldi r20, 0 |
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; continue |
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rjmp loop |
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; Counter overflow handler |
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timer: |
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; Set flag |
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ldi r20, 1 |
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; Re-enable interrupts |
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reti |
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