matrix.s
changeset 33 0d0309787be3
parent 31 dfb246ecaf23
child 34 4646abd073fb
equal deleted inserted replaced
32:7ceb76b5a104 33:0d0309787be3
     5 
     5 
     6 ;; Interrupt Vector
     6 ;; Interrupt Vector
     7 .org 0x00
     7 .org 0x00
     8         rjmp        init
     8         rjmp        init
     9 
     9 
       
    10 .org OC1Aaddr
       
    11 		; Timer/Counter1 Compare Output A
       
    12 		rjmp		Timer_OC1A
       
    13 
       
    14 .org OC0Aaddr
       
    15         ; Timer/Counter0 Compare Output A
       
    16         rjmp        Timer_OC0A
       
    17 
       
    18 .org SPIaddr
       
    19         rjmp        SPI_Interrupt
       
    20 
       
    21 .org 0x40
       
    22 
    10 ;; Syntax
    23 ;; Syntax
    11 .include "macros.inc"
    24 .include "macros.inc"
    12 
    25 
    13 ;; SPI
    26 ;; SPI
    14 .include "spi.inc"
    27 .include "spi.inc"
    15 
    28 
       
    29 ;; Matrix
       
    30 .include "matrix.inc"
       
    31 
       
    32 ;; Timer
       
    33 .set TIMER0_CB_A = Matrix_ScanCol
       
    34 
       
    35 .include "timer.inc"
       
    36 
    16 ;; Utils
    37 ;; Utils
    17 .include "delay.inc"
    38 .include "delay.inc"
    18 
    39 
    19 ;; Initialize output buffers
       
    20 Main_Init:
       
    21     ; Setup ENable port
       
    22         sbi         PORTB, PORTB1 	    	; high -> disabled
       
    23         sbi         DDRB, PORTB1    		; out
       
    24  
       
    25 	; all low
       
    26 		ldi			r16, 0
       
    27 
       
    28 		sts			spi_outbuf + 0, r16
       
    29 		sts			spi_outbuf + 1, r16
       
    30 
       
    31 	; write out
       
    32 		rcall		SPI_SendRecv
       
    33 
       
    34 	; enable
       
    35 		cbi			PORTB, PORTB1			; low -> enabled
       
    36 
       
    37 	; done
       
    38 		ret
       
    39 
       
    40 ;; Scan through each pixel
    40 ;; Scan through each pixel
    41 Main_Scan:
    41 Main_ScanRaw:
    42 	; init
    42 	; init
    43 		ldi			r18, 1
    43 		ldi			r18, 1
    44 		ldi			r19, 1
    44 		ldi			r19, 1
    45 
    45 
    46 scan_loop:
    46 scan_loop:
    52 
    52 
    53 	; delay
    53 	; delay
    54 		ldi			r20, 5					; ~4M cycles
    54 		ldi			r20, 5					; ~4M cycles
    55 		rcall		VarDelay
    55 		rcall		VarDelay
    56 
    56 
       
    57 	; cols
       
    58 		lsl			r19						; next col
       
    59 		brcc		scan_loop				; refresh if we didn't overflow
       
    60 		
       
    61 		rol			r19						; shift back from C into r21.0
       
    62 
    57 	; rows
    63 	; rows
    58 		rol			r18						; next row
    64 		lsl			r18						; next row
    59 		brcc		scan_loop				; refresh if we didn't overflow
    65 		brcc		scan_loop				; refresh if we didn't overflow
    60 		
    66 		
    61 		rol			r18						; shift back from C into r20.0
    67 		rol			r18						; shift back from C into r20.0
    62 
    68 
    63 	; cols
       
    64 		rol			r19						; next col
       
    65 		brcc		scan_loop				; refresh if we didn't overflow
       
    66 		
       
    67 		rol			r19						; shift back from C into r21.0
       
    68 
       
    69 	; one scan completed
    69 	; one scan completed
    70 		ret
    70 		ret
       
    71 
       
    72 ;; Scan with test pattern
       
    73 Main_ScanTest:
       
    74 	; Generate pattern
       
    75 		; end of buffer
       
    76 		ldi			r17, MATRIX_COLS
       
    77 		ldi			XL, low(matrix_rowbuf + MATRIX_COLS)
       
    78 		ldi			XH, high(matrix_rowbuf + MATRIX_COLS)
       
    79 		
       
    80 		; bit pattern
       
    81 		ldi			r16, 0b11
       
    82 
       
    83 st_loop:
       
    84 		; put
       
    85 		st			-X, r16
       
    86 
       
    87 		; flip
       
    88 		rol			r16
       
    89 		
       
    90 		; loop until zero	
       
    91 		dec			r17
       
    92 		brne		st_loop
       
    93 
       
    94 st_scan:
       
    95 	; Scan repeatedly
       
    96 		;rcall		Matrix_ScanCol
       
    97 		rjmp		st_scan
    71 
    98 
    72 Main:
    99 Main:
    73 init:
   100 init:
    74     ; Stack
   101     ; Stack
    75         ldi         r16, high(RAMEND)
   102         ldi         r16, high(RAMEND)
    78         out         SPL, r17
   105         out         SPL, r17
    79 
   106 
    80     ; Enable interrupts
   107     ; Enable interrupts
    81         sei
   108         sei
    82 
   109 
       
   110 ; DEBUG
       
   111 sbi			DDRD, PORTD7
       
   112 cbi			PORTD, PORTD7
       
   113 
       
   114 	; Timer
       
   115 		rcall		Timer_Init
       
   116 
    83     ; SPI
   117     ; SPI
    84         rcall       SPI_Init
   118         rcall       SPI_Init
       
   119 
       
   120 	; Matrix
       
   121 		rcall		Matrix_Init	
    85 	
   122 	
       
   123     ; Run
       
   124 		; rcall		Main_ScanRaw
    86 
   125 
    87     ; Run
   126 		rcall		Main_ScanTest
    88 		rcall		Main_Init
       
    89 
       
    90 loop:
       
    91 		rcall		Main_Scan
       
    92 		rjmp		loop
       
    93 
   127 
    94 end:
   128 end:
    95         rjmp        end
   129         rjmp        end
    96 
   130