timer.inc
changeset 21 95549ce0e3da
parent 18 79b25e81721f
child 29 453550e69e07
equal deleted inserted replaced
20:87cd7b25a94d 21:95549ce0e3da
     1 ;; vim: filetype=avr
     1 ;; vim: filetype=avr
     2 ;;
     2 ;;
     3 ;; Timer unit control and use
     3 ;; Timer unit control and use
     4 ;;
     4 ;;
     5 
       
     6 .include "macros.inc"
       
     7 
     5 
     8 ; Waveform Generation Mode (nibble low/high)
     6 ; Waveform Generation Mode (nibble low/high)
     9 .set TIMER_WGML = 0b00
     7 .set TIMER_WGML = 0b00
    10 .set TIMER_WGMH = 0b01
     8 .set TIMER_WGMH = 0b01
    11 
     9 
    12 ; Clock Source
    10 ; Clock Source
    13 .set TIMER_CS = 0b101
    11 .set TIMER_CS = 0b101
    14 
    12 
    15 .equ TIMER_FLAGS  = GPIOR0
    13 .equ TIMER_FLAGS = GPIOR0
    16 .equ TIMER_BUSY   = 1
    14 .equ TIMER_BUSY = 1
       
    15 
       
    16 .set SLEEP_MODE = 0b000			; Idle
    17 
    17 
    18 Timer_Init:
    18 Timer_Init:
    19 		; OC1A/B disconnected from output
    19 		; OC1A/B disconnected from output
    20 		; No PWM mode
    20 		; No PWM mode
    21 		poke		[TCCR1A, r16, (0b00 << COM1A0) | (0b00 << COM1B0) | (TIMER_WGML << WGM10)]
    21 		poke		[TCCR1A, r16, (0b00 << COM1A0) | (0b00 << COM1B0) | (TIMER_WGML << WGM10)]
    24 		poke		[TCCR1B, r16, 0]
    24 		poke		[TCCR1B, r16, 0]
    25 		poke		[TCCR1C, r16, 0]
    25 		poke		[TCCR1C, r16, 0]
    26 
    26 
    27 		; Enable timer overflow interrupt
    27 		; Enable timer overflow interrupt
    28 		poke		[TIMSK1, r16, (1 << OCIE1A)]
    28 		poke		[TIMSK1, r16, (1 << OCIE1A)]
    29 		
    29 
       
    30 Sleep_init:
       
    31 		; Select sleep mode
       
    32 		; Enable `sleep`
       
    33 		poke		[SMCR, r16, (SLEEP_MODE << SM0) | (1 << SE)]
       
    34 
       
    35 		; Disable ADC
       
    36 		poke		[SMCR, r16, (1 << PRTWI) | (1 << PRUSART0) | (1 << PRADC)]
       
    37 
    30 		ret
    38 		ret
    31 
    39 
    32 Timer_Start:
    40 Timer_Start:
    33 	; Initialize timer
    41 	; Initialize timer
    34 		poke		[TCNT1H, r16, high(0)]
    42 		poke		[TCNT1H, r16, high(0)]
    72 	; Start timer
    80 	; Start timer
    73 		rcall		Timer_Start
    81 		rcall		Timer_Start
    74 
    82 
    75 	; Wait for timer to complete
    83 	; Wait for timer to complete
    76 _timer_sleep:
    84 _timer_sleep:
    77 		;sleep
    85 		sleep
    78 
    86 		
    79 		sbic		TIMER_FLAGS, TIMER_BUSY
    87 		sbic		TIMER_FLAGS, TIMER_BUSY
    80 		rjmp		_timer_sleep
    88 		rjmp		_timer_sleep
    81 		
    89 
    82 	; Done
    90 	; Done
    83 		ret
    91 		ret
    84 
    92 
    85 ;; Prime the timer and sleep for 1s
    93 ;; Prime the timer and sleep for 1s
    86 Timer_Sleep_1s:
    94 Timer_Sleep_1s: