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67 * |
67 * |
68 * Returns 0 on interrupt, 1 on timeout. |
68 * Returns 0 on interrupt, 1 on timeout. |
69 */ |
69 */ |
70 char timer_sleep (int cycles) |
70 char timer_sleep (int cycles) |
71 { |
71 { |
72 // set timer |
72 if (cycles) { |
73 timer1_start(cycles); |
73 // set timer |
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74 timer1_start(cycles); |
|
75 } |
74 |
76 |
75 // sleep |
77 // sleep |
76 // TODO: PRR |
78 // TODO: PRR |
77 SMCR = ( |
79 SMCR = ( |
78 // idle sleep |
80 // idle sleep |
86 __asm__ ( "sleep" :: ); |
88 __asm__ ( "sleep" :: ); |
87 |
89 |
88 // cleanup |
90 // cleanup |
89 SMCR = 0; |
91 SMCR = 0; |
90 |
92 |
91 if (tbi(&TIMER_FLAGS, TIMER1_BUSY)) { |
93 if (cycles && !tbi(&TIMER_FLAGS, TIMER1_BUSY)) { |
|
94 // timeout |
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95 return 1; |
|
96 } else { |
92 timer1_stop(); |
97 timer1_stop(); |
93 |
98 |
94 // interrupt |
99 // interrupt |
95 return 0; |
100 return 0; |
96 } else { |
|
97 // timeout |
|
98 return 1; |
|
99 } |
101 } |
100 } |
102 } |
101 |
103 |
102 |
104 |