terom@18: ;;
terom@18: ;; Basic ADC operation
terom@18: ;;
terom@18: 
terom@32: ; Reference select
terom@32: .set ADC_REF    = 0b01      ; AVcc
terom@32: 
terom@32: ; Bit adjustment
terom@32: .set ADC_LAR    = 1         ; Left-adjust
terom@32: 
terom@32: ; Input select
terom@32: .set ADC_MUX    = 0b000     ; ADC0
terom@32: 
terom@32: ; Auto-trigger source
terom@32: .set ADC_ATS    = 0b011     ; TC0 OCA
terom@32: 
terom@32: ; Auto-trigger enable
terom@32: .set ADC_ATE    = 1
terom@32: 
terom@32: ; Prescaler
terom@32: .set ADC_PS     = 0b111     ; 1/128
terom@32: 
terom@32: ; I/O pins
terom@17: .equ ADC_DDR    = DDRC
terom@17: .equ ADC_PORT   = PORTC
terom@17: .equ ADC_PIN    = PORTC0
terom@17:         
terom@17: ;; Initialize the ADC for starting conversions
terom@17: ADC_Init:
terom@32:     ; ADMUX
terom@32:         ldi         r16, (ADC_REF << REFS0) | (ADC_LAR << ADLAR) | (ADC_MUX << MUX0)
terom@17:         sts         ADMUX, r16
terom@17:     
terom@32:     ; ADCSRB
terom@32:         ldi         r16, (ADC_ATS << ADTS0)
terom@17:         sts         ADCSRB, r16
terom@17: 
terom@32:     ; ADCSRA
terom@32:         ; ADSC: No need if using external auto-trigger ???
terom@32:         ; Enable interrupt
terom@32:         ldi         r16, (1 << ADEN) | (1 << ADSC) | (ADC_ATE << ADATE) | (1 << ADIE) | (ADC_PS << ADPS0)
terom@17:         sts         ADCSRA, r16
terom@32:     
terom@17:     ; Disable digital circuit for pin
terom@17:         ldi         r16, (1 << ADC_PIN)
terom@17:         sts         DIDR0, r16
terom@17: 
terom@17:     ; Done
terom@17:         ret
terom@17: 
terom@32: ;; Interrupt handler stub for ADC_HANDLER
terom@17: ADC_Interrupt:
terom@32:         in          r0, SREG
terom@32: 
terom@32:         rcall       ADC_HANDLER
terom@32: 
terom@32:         out         SREG, r0
terom@32:         reti
terom@17: 
terom@17: ;; Read the current 8-bit ADC sample 
terom@17: ; Returns value in r16
terom@17: ADC_Read8:
terom@17:     ; Copy
terom@17:         lds         r16, ADCH
terom@17: 
terom@17:     ; Done
terom@17:         ret
terom@17: