timer: try and actually sleep
authorTero Marttila <terom@fixme.fi>
Sat, 08 May 2010 20:07:18 +0300
changeset 21 95549ce0e3da
parent 20 87cd7b25a94d
child 22 fd72c63b8db8
timer: try and actually sleep
timer.inc
--- a/timer.inc	Sat May 08 17:57:53 2010 +0300
+++ b/timer.inc	Sat May 08 20:07:18 2010 +0300
@@ -3,8 +3,6 @@
 ;; Timer unit control and use
 ;;
 
-.include "macros.inc"
-
 ; Waveform Generation Mode (nibble low/high)
 .set TIMER_WGML = 0b00
 .set TIMER_WGMH = 0b01
@@ -12,8 +10,10 @@
 ; Clock Source
 .set TIMER_CS = 0b101
 
-.equ TIMER_FLAGS  = GPIOR0
-.equ TIMER_BUSY   = 1
+.equ TIMER_FLAGS = GPIOR0
+.equ TIMER_BUSY = 1
+
+.set SLEEP_MODE = 0b000			; Idle
 
 Timer_Init:
 		; OC1A/B disconnected from output
@@ -26,7 +26,15 @@
 
 		; Enable timer overflow interrupt
 		poke		[TIMSK1, r16, (1 << OCIE1A)]
-		
+
+Sleep_init:
+		; Select sleep mode
+		; Enable `sleep`
+		poke		[SMCR, r16, (SLEEP_MODE << SM0) | (1 << SE)]
+
+		; Disable ADC
+		poke		[SMCR, r16, (1 << PRTWI) | (1 << PRUSART0) | (1 << PRADC)]
+
 		ret
 
 Timer_Start:
@@ -74,11 +82,11 @@
 
 	; Wait for timer to complete
 _timer_sleep:
-		;sleep
-
+		sleep
+		
 		sbic		TIMER_FLAGS, TIMER_BUSY
 		rjmp		_timer_sleep
-		
+
 	; Done
 		ret