qmsk-dmx: docs/dmx.txt@2d68a76322cb (annotated)

62 2d68a76322cb hello-dmx: working basic dmx output using DmxSimple's frame-timing inline assembler code Tero Marttila <terom@paivola.fi> parents: 40 diff changeset	1
2d68a76322cb hello-dmx: working basic dmx output using DmxSimple's frame-timing inline assembler code Tero Marttila <terom@paivola.fi> parents: 40 diff changeset	2	## Specs:
2d68a76322cb hello-dmx: working basic dmx output using DmxSimple's frame-timing inline assembler code Tero Marttila <terom@paivola.fi> parents: 40 diff changeset	3
40 3803c0b40a9c docs: own dmx writeup Tero Marttila <terom@fixme.fi> parents: diff changeset	4	* 250 kHz clock
3803c0b40a9c docs: own dmx writeup Tero Marttila <terom@fixme.fi> parents: diff changeset	5	* 250000 bits / s
3803c0b40a9c docs: own dmx writeup Tero Marttila <terom@fixme.fi> parents: diff changeset	6	* 4µs / bit
3803c0b40a9c docs: own dmx writeup Tero Marttila <terom@fixme.fi> parents: diff changeset	7	* idle line = high (transmitter/master drives line high)
3803c0b40a9c docs: own dmx writeup Tero Marttila <terom@fixme.fi> parents: diff changeset	8
62 2d68a76322cb hello-dmx: working basic dmx output using DmxSimple's frame-timing inline assembler code Tero Marttila <terom@paivola.fi> parents: 40 diff changeset	9	## Pinout
40 3803c0b40a9c docs: own dmx writeup Tero Marttila <terom@fixme.fi> parents: diff changeset	10
62 2d68a76322cb hello-dmx: working basic dmx output using DmxSimple's frame-timing inline assembler code Tero Marttila <terom@paivola.fi> parents: 40 diff changeset	11	1 0 GND
2d68a76322cb hello-dmx: working basic dmx output using DmxSimple's frame-timing inline assembler code Tero Marttila <terom@paivola.fi> parents: 40 diff changeset	12	2 - B
2d68a76322cb hello-dmx: working basic dmx output using DmxSimple's frame-timing inline assembler code Tero Marttila <terom@paivola.fi> parents: 40 diff changeset	13	3 + A
2d68a76322cb hello-dmx: working basic dmx output using DmxSimple's frame-timing inline assembler code Tero Marttila <terom@paivola.fi> parents: 40 diff changeset	14
2d68a76322cb hello-dmx: working basic dmx output using DmxSimple's frame-timing inline assembler code Tero Marttila <terom@paivola.fi> parents: 40 diff changeset	15	## Protocol
40 3803c0b40a9c docs: own dmx writeup Tero Marttila <terom@fixme.fi> parents: diff changeset	16
3803c0b40a9c docs: own dmx writeup Tero Marttila <terom@fixme.fi> parents: diff changeset	17	* paket format
3803c0b40a9c docs: own dmx writeup Tero Marttila <terom@fixme.fi> parents: diff changeset	18	* break
3803c0b40a9c docs: own dmx writeup Tero Marttila <terom@fixme.fi> parents: diff changeset	19	* mark (MAB)
3803c0b40a9c docs: own dmx writeup Tero Marttila <terom@fixme.fi> parents: diff changeset	20	* 2-512 frames
3803c0b40a9c docs: own dmx writeup Tero Marttila <terom@fixme.fi> parents: diff changeset	21	* frame 0 = start code = 0x00
3803c0b40a9c docs: own dmx writeup Tero Marttila <terom@fixme.fi> parents: diff changeset	22	* frame N = channel N = 0-255
3803c0b40a9c docs: own dmx writeup Tero Marttila <terom@fixme.fi> parents: diff changeset	23	* 1 start bit, 8 data bits, 2 stop bits, no parity
3803c0b40a9c docs: own dmx writeup Tero Marttila <terom@fixme.fi> parents: diff changeset	24	* mark (MTBF)
3803c0b40a9c docs: own dmx writeup Tero Marttila <terom@fixme.fi> parents: diff changeset	25	* mark (MTAP)
3803c0b40a9c docs: own dmx writeup Tero Marttila <terom@fixme.fi> parents: diff changeset	26
3803c0b40a9c docs: own dmx writeup Tero Marttila <terom@fixme.fi> parents: diff changeset	27	* break
3803c0b40a9c docs: own dmx writeup Tero Marttila <terom@fixme.fi> parents: diff changeset	28	* syncs start of DMX packet
3803c0b40a9c docs: own dmx writeup Tero Marttila <terom@fixme.fi> parents: diff changeset	29	* >= 22 low bits (88 µs)
3803c0b40a9c docs: own dmx writeup Tero Marttila <terom@fixme.fi> parents: diff changeset	30	* up to 1s
3803c0b40a9c docs: own dmx writeup Tero Marttila <terom@fixme.fi> parents: diff changeset	31	* recommended 25 - 30 low bits
3803c0b40a9c docs: own dmx writeup Tero Marttila <terom@fixme.fi> parents: diff changeset	32
3803c0b40a9c docs: own dmx writeup Tero Marttila <terom@fixme.fi> parents: diff changeset	33	* mark after break (MAB)
3803c0b40a9c docs: own dmx writeup Tero Marttila <terom@fixme.fi> parents: diff changeset	34	* immediately follows the break
3803c0b40a9c docs: own dmx writeup Tero Marttila <terom@fixme.fi> parents: diff changeset	35	* high mark of > 2 bits (8µs)
3803c0b40a9c docs: own dmx writeup Tero Marttila <terom@fixme.fi> parents: diff changeset	36	* up to 1s
3803c0b40a9c docs: own dmx writeup Tero Marttila <terom@fixme.fi> parents: diff changeset	37	* recommended 3 high bits
3803c0b40a9c docs: own dmx writeup Tero Marttila <terom@fixme.fi> parents: diff changeset	38
3803c0b40a9c docs: own dmx writeup Tero Marttila <terom@fixme.fi> parents: diff changeset	39	* (channel frames)
3803c0b40a9c docs: own dmx writeup Tero Marttila <terom@fixme.fi> parents: diff changeset	40	* first frame is start code (SC)
3803c0b40a9c docs: own dmx writeup Tero Marttila <terom@fixme.fi> parents: diff changeset	41	* data value = 0x00 signifies dimmer data
3803c0b40a9c docs: own dmx writeup Tero Marttila <terom@fixme.fi> parents: diff changeset	42
3803c0b40a9c docs: own dmx writeup Tero Marttila <terom@fixme.fi> parents: diff changeset	43	* 11 bits / frame
3803c0b40a9c docs: own dmx writeup Tero Marttila <terom@fixme.fi> parents: diff changeset	44	* 1 low bit (start bit)
3803c0b40a9c docs: own dmx writeup Tero Marttila <terom@fixme.fi> parents: diff changeset	45	* 8 data bits (0-255)
3803c0b40a9c docs: own dmx writeup Tero Marttila <terom@fixme.fi> parents: diff changeset	46	* 2 high bits (stop bits)
3803c0b40a9c docs: own dmx writeup Tero Marttila <terom@fixme.fi> parents: diff changeset	47
3803c0b40a9c docs: own dmx writeup Tero Marttila <terom@fixme.fi> parents: diff changeset	48	* mark time between frames (MTBF)
3803c0b40a9c docs: own dmx writeup Tero Marttila <terom@fixme.fi> parents: diff changeset	49	* idle time between frames; line kept high
3803c0b40a9c docs: own dmx writeup Tero Marttila <terom@fixme.fi> parents: diff changeset	50	* can be as short as desired
3803c0b40a9c docs: own dmx writeup Tero Marttila <terom@fixme.fi> parents: diff changeset	51
3803c0b40a9c docs: own dmx writeup Tero Marttila <terom@fixme.fi> parents: diff changeset	52	* between 1 and 512 sequential frames
3803c0b40a9c docs: own dmx writeup Tero Marttila <terom@fixme.fi> parents: diff changeset	53
3803c0b40a9c docs: own dmx writeup Tero Marttila <terom@fixme.fi> parents: diff changeset	54	* mark time between packets (MTBP)
3803c0b40a9c docs: own dmx writeup Tero Marttila <terom@fixme.fi> parents: diff changeset	55	* after the last frame's stop bits
3803c0b40a9c docs: own dmx writeup Tero Marttila <terom@fixme.fi> parents: diff changeset	56	* same as MTBF
3803c0b40a9c docs: own dmx writeup Tero Marttila <terom@fixme.fi> parents: diff changeset	57	* idle time between packets; line kept high
3803c0b40a9c docs: own dmx writeup Tero Marttila <terom@fixme.fi> parents: diff changeset	58	* can be as short as desired
3803c0b40a9c docs: own dmx writeup Tero Marttila <terom@fixme.fi> parents: diff changeset	59
3803c0b40a9c docs: own dmx writeup Tero Marttila <terom@fixme.fi> parents: diff changeset	60

author	Tero Marttila <terom@paivola.fi>
	Sun, 06 Apr 2014 18:25:55 +0300
changeset 62	2d68a76322cb
parent 40	3803c0b40a9c
permissions	-rw-r--r--