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;; vim: filetype=avr

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;;

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;; Timer unit control and use

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;;

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.include "macros.inc"

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; Waveform Generation Mode (nibble low/high)

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.set TIMER_WGML = 0b00

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.set TIMER_WGMH = 0b01

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; Clock Source

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.set TIMER_CS = 0b101

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.equ TIMER_FLAGS  = GPIOR0

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.equ TIMER_BUSY   = 1

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Timer_Init:

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		; OC1A/B disconnected from output

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		; No PWM mode

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		poke		[TCCR1A, r16, (0b00 << COM1A0) | (0b00 << COM1B0) | (TIMER_WGML << WGM10)]

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		; Clear

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		poke		[TCCR1B, r16, 0]

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		poke		[TCCR1C, r16, 0]

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		; Enable timer overflow interrupt

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		poke		[TIMSK1, r16, (1 << OCIE1A)]

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		ret

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Timer_Start:

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	; Initialize timer

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		poke		[TCNT1H, r16, high(0)]

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		poke		[TCNT1L, r16, low(0)]

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	; Set flag

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		sbi			TIMER_FLAGS, TIMER_BUSY

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		; WGM

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		; Clock Source

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		poke		[TCCR1B, r16, (TIMER_WGMH << WGM12) | (TIMER_CS << CS10)]

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		ret

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Timer_Stop:

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		; WGM

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		; Clock off

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		poke		[TCCR1B, r16, (TIMER_WGMH << WGM12) | (0b00 << CS10)]

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	; Clear flag

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		cbi			TIMER_FLAGS, TIMER_BUSY

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		ret

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;; Timer Compare 1A interrupt handler

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Timer_OC1A:

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		in			r0, SREG

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	; Stop timer

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		rcall		Timer_Stop

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		out			SREG, r0

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		reti

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;; Count to X

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Timer_Sleep:

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	; Set TOP

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		sts			OCR1AH, XH

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		sts			OCR1AL, XL

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	; Start timer

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		rcall		Timer_Start

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	; Wait for timer to complete

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_timer_sleep:

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		;sleep

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		sbic		TIMER_FLAGS, TIMER_BUSY

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		rjmp		_timer_sleep

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	; Done

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		ret

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;; Prime the timer and sleep for 1s

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Timer_Sleep_1s:

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	; Initialize counter to 16k cycles

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		ldi			XH, high(16 * 1024)

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		ldi			XL, low(16 * 1024)

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	; Start timer

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		rjmp		Timer_Sleep

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