author | Tero Marttila <terom@paivola.fi> |
Fri, 11 Apr 2014 19:30:41 +0300 | |
changeset 69 | ef9fe98ebf72 |
parent 62 | 2d68a76322cb |
permissions | -rw-r--r-- |
62
2d68a76322cb
hello-dmx: working basic dmx output using DmxSimple's frame-timing inline assembler code
Tero Marttila <terom@paivola.fi>
parents:
40
diff
changeset
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2d68a76322cb
hello-dmx: working basic dmx output using DmxSimple's frame-timing inline assembler code
Tero Marttila <terom@paivola.fi>
parents:
40
diff
changeset
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2 |
## Specs: |
2d68a76322cb
hello-dmx: working basic dmx output using DmxSimple's frame-timing inline assembler code
Tero Marttila <terom@paivola.fi>
parents:
40
diff
changeset
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40 | 4 |
* 250 kHz clock |
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* 250000 bits / s |
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* 4µs / bit |
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* idle line = high (transmitter/master drives line high) |
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2d68a76322cb
hello-dmx: working basic dmx output using DmxSimple's frame-timing inline assembler code
Tero Marttila <terom@paivola.fi>
parents:
40
diff
changeset
|
9 |
## Pinout |
40 | 10 |
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2d68a76322cb
hello-dmx: working basic dmx output using DmxSimple's frame-timing inline assembler code
Tero Marttila <terom@paivola.fi>
parents:
40
diff
changeset
|
11 |
1 0 GND |
2d68a76322cb
hello-dmx: working basic dmx output using DmxSimple's frame-timing inline assembler code
Tero Marttila <terom@paivola.fi>
parents:
40
diff
changeset
|
12 |
2 - B |
2d68a76322cb
hello-dmx: working basic dmx output using DmxSimple's frame-timing inline assembler code
Tero Marttila <terom@paivola.fi>
parents:
40
diff
changeset
|
13 |
3 + A |
2d68a76322cb
hello-dmx: working basic dmx output using DmxSimple's frame-timing inline assembler code
Tero Marttila <terom@paivola.fi>
parents:
40
diff
changeset
|
14 |
|
2d68a76322cb
hello-dmx: working basic dmx output using DmxSimple's frame-timing inline assembler code
Tero Marttila <terom@paivola.fi>
parents:
40
diff
changeset
|
15 |
## Protocol |
40 | 16 |
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* paket format |
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* break |
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* mark (MAB) |
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* 2-512 frames |
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* frame 0 = start code = 0x00 |
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* frame N = channel N = 0-255 |
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* 1 start bit, 8 data bits, 2 stop bits, no parity |
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* mark (MTBF) |
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* mark (MTAP) |
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* break |
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* syncs start of DMX packet |
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* >= 22 low bits (88 µs) |
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* up to 1s |
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* recommended 25 - 30 low bits |
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* mark after break (MAB) |
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* immediately follows the break |
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* high mark of > 2 bits (8µs) |
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* up to 1s |
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* recommended 3 high bits |
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* (channel frames) |
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* first frame is start code (SC) |
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* data value = 0x00 signifies dimmer data |
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* 11 bits / frame |
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* 1 low bit (start bit) |
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* 8 data bits (0-255) |
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* 2 high bits (stop bits) |
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* mark time between frames (MTBF) |
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* idle time between frames; line kept high |
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* can be as short as desired |
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* between 1 and 512 sequential frames |
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* mark time between packets (MTBP) |
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* after the last frame's stop bits |
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* same as MTBF |
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* idle time between packets; line kept high |
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* can be as short as desired |
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